VOV on ZSP200 DSPs

Processor Support

ZSP200 Family

VOV is VINJEY's implementation of Ogg Vorbis I Decoder. Vorbis is general purpose perceptual audio codec from xiph.org foundation. It intends to allow maximum encoder flexibility, thus allowing it to scale competitively over exceptionally wide range of bit rates.

VOV is an independent implementation of Ogg vorbis decoder developed from scratch by VINJEY Software, keeping in mind with the MIPS and Memory requirements of resource constrained embedded solutions. VOV has support for detecting and handling lost and errant packets in the input stream. VOV has an effective memory management algorithm, that ensure no dynamic memory allocation is required. VOV supports decoding of input streams with Floor0. Support for Floor0, can be enabled (Or) disable at compile time.

The VeriSilicon ZSP200 is a fully synthesizable, low cost DSP core that can be easily integrated into and programmed on SOC design. The ZSP200 DSP core enables optimal cost and power saving in applications where a microprocessor cannot deliver the DSP performance required. The ZSP200 supports up to 2 instructions per cycle with parallel MAC and ALU.

We provide highly optimized implementation of ZSP200 DSP Platform on request. To obtain data sheet for the same mail us.