VOV on TMS320C55x DSPs Processor Support TMS320C55x Family Overview
VOV is VINJEY's implementation of Ogg Vorbis I Decoder. Vorbis is general purpose perceptual audio codec from xiph.org foundation.
It intends to allow maximum encoder flexibility, thus allowing it to scale competitively over exceptionally wide range of bit rates.
The C55x™ DSP architecture achieves high performance and low power through increased parallelism and total focus on reduction in power dissipation. The CPU supports an internal bus structure that is composed of one program bus, three data read buses, two data write buses, and additional buses dedicated to peripheral and DMA activity. These buses provide the ability to perform up to three data reads and two data writes in a single cycle. In parallel, the DMA controller can perform up to two data transfers per cycle independent of the CPU activity. The C55x CPU provides two multiply-accumulate (MAC) units, each capable of 17-bit × 17-bit multiplication in a single cycle. A central 40-bit arithmetic/logic unit (ALU) is supported by an additional 16-bit ALU. Use of the ALUs is under instruction set control, providing the ability to optimize parallel activity and power consumption. These resources are managed in the Address Unit (AU) and Data Unit (DU) of the C55x CPU. We provide highly optimized implementation of TMS320C55x DSP Platform on request. To obtain data sheet for the same mail us. AvailabilityOgg Vorbis for TMS320C55x DSP is available for licensing. For more details on licensing mail us. Trial VersionVINJEY provides Trial Version to prospective customers for the evaluation of the TMS320C55x Platform. Visit Trial Version page to request for a trial version. |